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Print PCIe Extended Capabilities, from Simon Mages
ok kettenis mlarkin
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@ -1,4 +1,4 @@
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/* $OpenBSD: pcireg.h,v 1.50 2016/06/02 21:01:51 kettenis Exp $ */
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/* $OpenBSD: pcireg.h,v 1.51 2017/03/16 22:05:44 deraadt Exp $ */
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/* $NetBSD: pcireg.h,v 1.26 2000/05/10 16:58:42 thorpej Exp $ */
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/*
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@ -593,6 +593,15 @@ typedef u_int8_t pci_revision_t;
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#define PCI_PCIE_RCSR 0x1c
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#define PCI_PCIE_LCAP2 0x2c
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/*
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* PCI Express; enhanced capabilities
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*/
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#define PCI_PCIE_ECAP 0x100
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#define PCI_PCIE_ECAP_ID(x) (((x) & 0x0000ffff))
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#define PCI_PCIE_ECAP_VER(x) (((x) >> 16) & 0x0f)
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#define PCI_PCIE_ECAP_NEXT(x) ((x) >> 20)
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#define PCI_PCIE_ECAP_LAST 0x0
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/*
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* Extended Message Signaled Interrups; access via capability pointer.
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*/
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@ -1,4 +1,4 @@
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/* $OpenBSD: pcidump.c,v 1.41 2017/01/04 03:35:29 dlg Exp $ */
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/* $OpenBSD: pcidump.c,v 1.42 2017/03/16 22:05:46 deraadt Exp $ */
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/*
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* Copyright (c) 2006, 2007 David Gwynne <loki@animata.net>
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@ -102,6 +102,39 @@ const char *pci_capnames[] = {
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"PCI Advanced Features"
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};
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const char *pci_enhanced_capnames[] = {
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"Unknown",
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"Advanced Error Reporting",
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"Virtual Channel Capability",
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"Device Serial Number",
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"Power Budgeting",
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"Root Complex Link Declaration",
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"Root Complex Internal Link Control",
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"Root Complex Event Collector",
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"Multi-Function VC Capability",
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"Virtual Channel Capability",
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"Root Complex/Root Bridge",
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"Vendor-Specific",
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"Config Access",
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"Access Control Services",
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"Alternate Routing ID",
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"Address Translation Services",
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"Single Root I/O Virtualization",
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"Multi Root I/O Virtualization",
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"Multicast",
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"Page Request Interface",
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"Reserved for AMD",
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"Resizable BAR",
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"Dynamic Power Allocation",
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"TPH Requester",
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"Latency Tolerance Reporting",
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"Secondary PCIe Capability",
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"Protocol Multiplexing",
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"Process Address Space ID",
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"Downstream Port Containment",
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"Precision Time Measurement",
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};
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int
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main(int argc, char *argv[])
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{
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@ -355,6 +388,35 @@ dump_pcie_linkspeed(int bus, int dev, int func, uint8_t ptr)
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printf(" GT/s Link Width: x%d / x%d\n", swidth, cwidth);
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}
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void
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dump_pcie_enhanced_caplist(int bus, int dev, int func)
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{
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u_int32_t reg;
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u_int16_t ptr;
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u_int16_t ecap;
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ptr = PCI_PCIE_ECAP;
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do {
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if (pci_read(bus, dev, func, ptr, ®) != 0)
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return;
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if (PCI_PCIE_ECAP_ID(reg) == 0xffff &&
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PCI_PCIE_ECAP_NEXT(reg) == PCI_PCIE_ECAP_LAST)
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return;
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ecap = PCI_PCIE_ECAP_ID(reg);
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if (ecap >= nitems(pci_enhanced_capnames))
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ecap = 0;
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printf("\t0x%04x: Enhanced Capability 0x%02x: ", ptr, ecap);
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printf("%s\n", pci_enhanced_capnames[ecap]);
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ptr = PCI_PCIE_ECAP_NEXT(reg);
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} while (ptr != PCI_PCIE_ECAP_LAST);
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}
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void
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dump_caplist(int bus, int dev, int func, u_int8_t ptr)
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{
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@ -379,8 +441,10 @@ dump_caplist(int bus, int dev, int func, u_int8_t ptr)
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printf("%s\n", pci_capnames[cap]);
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if (cap == PCI_CAP_PWRMGMT)
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dump_pci_powerstate(bus, dev, func, ptr);
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if (cap == PCI_CAP_PCIEXPRESS)
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if (cap == PCI_CAP_PCIEXPRESS) {
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dump_pcie_linkspeed(bus, dev, func, ptr);
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dump_pcie_enhanced_caplist(bus, dev, func);
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}
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ptr = PCI_CAPLIST_NEXT(reg);
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}
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}
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