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Code

recognise more pci capabilities

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from PCI Code and ID Assignment Specification
This commit is contained in:
jsg 2021-07-16 09:14:17 +00:00
parent 76eecf5e6b
commit 1e22210c88
1 changed files with 21 additions and 2 deletions
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23
usr.sbin/pcidump/pcidump.c
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@ -1,4 +1,4 @@
/* $OpenBSD: pcidump.c,v 1.65 2021/07/12 15:09:21 beck Exp $ */
/* $OpenBSD: pcidump.c,v 1.66 2021/07/16 09:14:17 jsg Exp $ */
/*
* Copyright (c) 2006, 2007 David Gwynne <loki@animata.net>
@ -110,7 +110,9 @@ const char *pci_capnames[] = {
"PCI Express",
"Extended Message Signalled Interrupts (MSI-X)",
"SATA",
"PCI Advanced Features"
"PCI Advanced Features",
"Enhanced Allocation",
"Flattening Portal Bridge",
};
const char *pci_enhanced_capnames[] = {
@ -146,6 +148,23 @@ const char *pci_enhanced_capnames[] = {
"Downstream Port Containment",
"L1 PM",
"Precision Time Measurement",
"PCI Express over M-PHY",
"FRS Queueing",
"Readiness Time Reporting",
"Designated Vendor-Specific",
"VF Resizable BAR",
"Data Link Feature ",
"Physical Layer 16.0 GT/s",
"Lane Margining at the Receiver",
"Hierarchy ID",
"Native PCIe Enclosure Management",
"Physical Layer 32.0 GT/s",
"Alternate Protocol",
"System Firmware Intermediary",
"Shadow Functions",
"Data Object Exchange",
"Device 3",
"Integrity and Data Encryption",
};
int